EENG 414 - High Level Digital ASIC Design Using CAD

Design of digital application-specific integrated circuits (ASICS) using synthesis CAD tools. Topics include the following: design flow, hierarchical design, hardware description languages such as VHDL, synthesis, design verification, IC test, chip-scale synchronous design, field programmable gate arrays, mask programmable gate arrays, CMOS circuits and IC process technology. For the project, students will design and implement a significant digital system using field programmable gate arrays.
Prerequisites
EENG 318.
Hours
Two class periods and one three-hour lab period.
When Offered
Offered occasionally.
(3 cr.)

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AUC New Cairo Campus

AUC Tahrir Square Campus

New York

EENG 414 - High Level Digital ASIC Design Using CAD