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Dec 26, 2024
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EENG 416/4106 - Advanced ASIC Design (3 cr.)
Prerequisites
Description This course covers advanced topics related to netlist synthesis, place & route, timing verification, clock tree insertion, power grid distribution, floorplanning of cell-based ASIC design. Other advanced verification techniques topics related to the design automation flow will be covered. Students will design a standard cell library using Verilog for their project.
When Offered Offered occasionally.
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