EENG 416 - Advanced ASIC Design

This course covers advanced topics related to netlist synthesis, place & route, timing verification, clock tree insertion, power grid distribution, floorplanning of cell-based ASIC design. Other advanced verification techniques topics related to the design automation flow will be covered. Students will design a standard cell library using Verilog for their project.
Prerequisites
Prerequisite: EENG 414.
When Offered
Offered occasionally.
(3 cr.)

Check course scheduling information

AUC New Cairo Campus

AUC Tahrir Square Campus

New York

EENG 416 - Advanced ASIC Design